Jack Whitham

Software Engineer

Work History

This page describes some of the jobs I've done since I finished my PhD in 2008.

Lead software engineer at ETAS

2020-present

At ETAS I work on AUTOSAR "basic software" modules, used in automotive embedded systems. I joined a team which produced components for the ISOLAR product to generate and configure basic software modules. In AUTOSAR terminology, "basic software" means operating system components that are neither device drivers nor part of the microkernel: protocol stacks for TCP/IP or CAN are examples, as are crypto modules and filesystems.

I was hired as a embedded software specialist but I soon found that a very broad skillset was needed, and that it was just as likely that I'd be debugging Java code in Eclipse than embedded C code with Lauterbach.

I was the technical lead on several projects, including:

  • A framework for testing which facilitated updating the tests for newer versions of basic software modules and newer versions of the AUTOSAR standard. This framework involved some C and some Java, but the core was Python 3 with static type annotations.
  • Cloud deployment of the continuous integration system. I found that Jenkins was too limited to effectively meet the team's needs for executing large numbers of tests in parallel, so I built a dynamic parallel scheduling system on top of it using Python and Groovy.
  • A Git-based framework for managing patches to be applied to the source code of basic software modules. This made it easy to incorporate new versions of modules while retaining local changes to fix bugs or add features.
  • Internal modifications to the RCPTT tool to add support for newer GUI features such as JavaFX widgets and Nattables which were introduced by ISOLAR improvements.

I was also closely involved in other projects, including:

  • A project to fully automate tests involving special hardware (e.g. development boards) and compilers such as GreenHills.
  • Working with technical authors to update product documentation.
  • Introducing Linux support to the product, and the build/test infrastructure to match it. This was a large effort involving many other teams.

My day-to-day work at ETAS involves reviewing code changes (pull requests) and providing feedback via Jira. Alongside project work, I assist other team members with debugging and analysis tasks, based on discussions in the daily scrum.

Senior software engineer at Rapita Systems Ltd.

2013-2020

I joined Rapita Systems when it was a small company and I contributed to many projects there. Rapita had initially focused on timing analysis for embedded systems, but when I joined, they had recently added a coverage testing product, which was already proving to be highly successful with avionics industry customers. Since the Ada programming language was used internally at Rapita, the company was also able to offer great customer support for anyone who wanted to measure coverage of Ada projects. Existing coverage testing products either didn't support Ada at all, or had poor support for recent language and certification standards. I hadn't used Ada much before, but I found it quite easy to learn and use, and as well as developing features and maintaining the tools, I worked with some big customers to integrate features that they particularly needed.

I was the technical lead on several projects, including:

  • An improved analyser for Ada code with support for the latest language standards and GNAT compiler versions; this used the ASIS interface to access the syntax tree produced by GNAT.
  • A tool to analyse branch traces captured from a simulator, Nexus interface or ARM embedded trace macrocell, and then construct coverage data or a timing report. This "zero instrumentation" technology was a first for Rapita as the company's other tools required customer source code to be analysed by a compiler frontend and then modified to add instrumentation points.
  • Integration of Reprise License Manager.
  • Kernel modifications for PowerPC Linux to allow "kernel time" to be excluded from a timing trace captured from an embedded application. My kernel modifications can be found on Github (a mixture of C and PPC assembly code).
  • A parallelised test runner for the continuous integration system, written in Perl and using TCP sockets to coordinate parallel work.
  • Development of tools to run Windows, Linux and bare-metal programs with repeatable, deterministic timing for testing purposes, such as my own x86determiniser and a modification for QEMU.

I was also closely involved in other projects, including:

  • A project to replace analysers for C/C++ with a Clang frontend.
  • A project to use SQLite database storage for analysed source files, providing a common interface between code analysers, instrumenters and a new unit testing tool.
  • Working with the tool qualification team to accurately specify and implement recommendations from CAST within the Ada analyser and associated tools.

My day-to-day work at Rapita often involved reproducing difficult or rare bugs, analysing them and fixing them. I worked mainly on Linux and was greatly assisted by the Undo tools.

Research Associate at the University of York Department of Computer Science

2008-2013

At the University of York's Department of Computer Science I was part of the Real-time Systems Group. I worked on several research projects and continued my own research into time-predictable embedded systems, following on from my PhD thesis. During this time I wrote various papers and presented them at conferences around the world. I also helped to set up the hardware and software that would support an embedded systems course, and I supervised some undergraduate projects.

I was involved with the following research projects:

  • JEOPARD (FP7, 2008-2010). Here I developed middleware to interface FPGA hardware and Java code, running on the JOP CPU, Linux and PikeOS. I made use of the Java Native Interface, wrote a Linux kernel module, and wrote Verilog code to use the PCI Express interface of a Xilinx FPGA board. I collaborated with staff at EADS (now Astrium).
  • EMUCO (FP7, 2008-2010). In this project I instrumentation and logging capabilities to the "Fiasco" L4 kernel running on a 4-core ARM platform and wrote software to generate Gantt charts.
  • T-CREST (FP7, 2011-2014). Here I developed a network-on-chip generator for Xilinx FPGAs.
  • TEMPO (EPSRC, 2011-2013). I worked on time-predictable computer architectures: CPUs and scratchpad memories intende for implementation of embedded real-time systems, with designs intended to simplify worst-case execution time (WCET) analysis. I designed FPGA hardware, software simulators, schedulability analysis software and a real-time microkernel.

Much of this research involved writing software and FPGA-based hardware in order to run experiments involving time-predictable architectures. For these tasks, I used C, Python, VHDL, Verilog and Bluespec System Verilog.

Not everything reached a publication stage. For example, an attempt to modify Clang to add features to allow programs to make easy use of scratchpad memory was never completed, because other research convinced me that the WCET of software built with such a compiler and using scratchpad hardware would not be competitive with the WCET of the same software using a conventional compiler and cache.