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JACK WHITHAM PhD MEng Professional Activities - Publications - Software - Articles |
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| Home -> Software -> Patches for Simplescalar-ARM 0.2 |
Note: If you are interested in accurate CPU simulation for either a single program (system call emulation) or an entire system, you should look into the more recent M5 simulator. It is being actively developed and it improves upon Simplescalar in a number of important ways.
Here are some patches for simplesim-arm-0.2, the ARM version of the Simplescalar simulator. Simplesim-arm can be obtained from http://www.simplescalar.com/v4test.html.
Simplesim-arm has not been updated in a while. As a former simplesim-arm user, I wrote (or collected) various source patches that I found a need for. See my website for more information about me. Read about my Simplescalar/RTEMS project.
This patch fixes the problem with errno during linking, which causes
messages such as eval.c:907: undefined reference to `errno' to
appear. errno used to be a static variable, but on modern systems it has
been redefined as a macro in order to avoid problems with multithreading.
There's a bug in the implementation of the microcode for LFM and SFM
in Simplesim-ARM 0.2. The bug shows up when LFM or SFM is used to write
two or more registers in predecrement mode with writeback, provided that
a microcoded simulator is used (e.g. sim-uop). This patch corrects the bug.
This is a patch for simplesim-arm from the Fit project. It came from
http://www.elis.ugent.be/fit/files/simplescalar.patch.
I don't know much about this patch because I didn't write it.
It fixes the errno problem, but also appears to add some system
calls and some new instructions which I don't understand.
Here are some patches for sim-panalyzer-2.0.2, which is
available from
http://www.eecs.umich.edu/~panalyzer/. It is derived from Simplesim-ARM: possibly from a later
version than 0.2. As such it still requires the LFM-SFM patch, but
the errno problem appears to already have been fixed.
I found two (host) memory corrupting bugs in sim-panalyzer, using
valgrind. This is the fix for both.
Sometimes, a L2 cache line must be written to memory so that a new line can be loaded in its place. Unfortunately, the data that is written back may be out of date, because Simplescalar accesses memory directly and uses the cache simulation only for timing purposes. Simplescalar-ARM 0.2 doesn't write data from cache to memory, and works correctly. However, for some reason, sim-panalyzer does write data from cache to memory, and it ends up clobbering important data in memory by doing this. I don't know why this has been done. There is a simple fix though: stop writing data from cache to memory. That's what the patch does.
This patch has been throughly tested. Unpatched, I found that around
5% of the thousands of simulations that I have been running were failing
due to memory corruption issues. With the patch, none fail.
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| Copyright (C) Jack Whitham 1997-2008 | |||