diff -rC2 simplesim-arm-1/sim-outorder.c simplesim-arm-2/sim-outorder.c *** simplesim-arm-1/sim-outorder.c 2005-03-14 13:37:32.000000000 +0000 --- simplesim-arm-2/sim-outorder.c 2005-03-16 17:46:07.000000000 +0000 *************** *** 510,519 **** /* cycle counter */ tick_t sim_cycle = 0; tick_t timer_next_interrupt_at = 0; tick_t timer_period = 0; int timer_return_from_interrupt_address = 0; int timer_do_return_from_interrupt = 0; ! enum { PENDING_FLUSH , ! HANDLING , NORMAL } timer_int_state ; static void do_return_from_interrupt ( bool_t swap_regs ) ; --- 510,520 ---- /* cycle counter */ tick_t sim_cycle = 0; + tick_t sim_cycles_in_idle_task = 0; tick_t timer_next_interrupt_at = 0; tick_t timer_period = 0; int timer_return_from_interrupt_address = 0; + int sim_in_idle_task = 0; int timer_do_return_from_interrupt = 0; ! enum { PENDING_FLUSH , HANDLING , NORMAL } timer_int_state ; static void do_return_from_interrupt ( bool_t swap_regs ) ; *************** *** 1501,1504 **** --- 1502,1508 ---- "total simulation time in cycles", &sim_cycle, /* initial value */0, /* format */NULL); + stat_reg_counter(sdb, "sim_cycles_in_idle_task", + "total simulation time spent in idle task", + &sim_cycles_in_idle_task, /* initial value */0, /* format */NULL); stat_reg_formula(sdb, "sim_IPC", "instructions per cycle", *************** *** 5376,5379 **** --- 5380,5384 ---- allow_dispatch = ( timer_int_state != PENDING_FLUSH ) || in_flow ; + sim_in_idle_task = 0 ; /* RUU/LSQ sanity checks */ *************** *** 5556,5559 **** --- 5561,5583 ---- { case NORMAL : + if ( sim_in_idle_task ) + { + tick_t cycle_warp ; + + /* Stay in idle task until we get a timer interrupt. + * Of course, we might never get one... Check for that */ + if (( timer_next_interrupt_at <= 0 ) /* timer off */ + || (( PSR & 0x80 ) != 0 )) /* ints disabled */ + { + panic ( "entered idle task without enabling " + "interrupts and/or timer" ) ; + } + cycle_warp = timer_next_interrupt_at - sim_cycle ; + if ( cycle_warp > 0 ) + { + sim_cycles_in_idle_task += cycle_warp ; + sim_cycle += cycle_warp ; + } + } if (( timer_next_interrupt_at > 0 ) && (( PSR & 0x80 ) == 0 ) *************** *** 5561,5573 **** && ( sim_cycle >= timer_next_interrupt_at )) { double seconds = (( (double) ((long long) sim_cycle )) / ( (double) MD_CLOCK_CYCLES_PER_MICROSECOND * 1000000.0 )) ; timer_int_state = PENDING_FLUSH ; timer_do_return_from_interrupt = 0 ; timer_next_interrupt_at = sim_cycle + timer_period ; - fprintf ( stderr , "tick - %lld - %1.4f seconds\n" , - ((long long) sim_cycle ) , seconds ) ; - /* verbose = 1 ; */ } break ; --- 5585,5599 ---- && ( sim_cycle >= timer_next_interrupt_at )) { + #ifdef JACK_DEBUGGING double seconds = (( (double) ((long long) sim_cycle )) / ( (double) MD_CLOCK_CYCLES_PER_MICROSECOND * 1000000.0 )) ; + + fprintf ( stderr , "tick - %lld - %1.4f seconds\n" , + ((long long) sim_cycle ) , seconds ) ; + #endif timer_int_state = PENDING_FLUSH ; timer_do_return_from_interrupt = 0 ; timer_next_interrupt_at = sim_cycle + timer_period ; } break ; diff -rC2 simplesim-arm-1/syscall.c simplesim-arm-2/syscall.c *** simplesim-arm-1/syscall.c 2005-03-14 13:37:32.000000000 +0000 --- simplesim-arm-2/syscall.c 2005-03-16 17:39:06.000000000 +0000 *************** *** 1010,1013 **** --- 1010,1014 ---- extern tick_t timer_period ; extern tick_t sim_cycle ; + extern int sim_in_idle_task ; /* ARM SYSTEM CALL CONVENTIONS *************** *** 2096,2099 **** --- 2097,2102 ---- timer_next_interrupt_at = sim_cycle + timer_period ; break ; + case 0x99991 : sim_in_idle_task = 1 ; + break ;